Fig. 5

Schematic diagrams of the current pulse amplification circuit and the comparator. a The current pulse amplification circuit consists of a bias circuit and main amplifier circuits. The input impedance of the main amplifier circuits is set to about 50 Ω. The drive current \({I}_{\mathrm{ref}}\) for the bias circuit is represented by the brown arrow. The bias output (\({V}_{\mathrm{b}1}\) and \({V}_{\mathrm{b}2}\)) provides the gate voltage to CMOS M1 and M2, which determines the operating point for the amplification circuits. M3 and M4 amplify the input pulse and output signals to the \({V}_{\mathrm{out}\_\mathrm{amp}}\) terminal. b The main circuit of the comparator consists of three blocks. 1. Differential input circuit (M6 and M8) with an active load (M5 and M7). The \({V}_{\mathrm{in}\_\mathrm{com}}\) terminal is connected to the output of the current pulse amplification circuit (i.e., “\({V}_{\mathrm{out}\_\mathrm{amp}}"\) terminal). The reference voltage for this comparator is applied to the \({V}_{\mathrm{ref}}\) terminal. 2. Amplification stage for improving gain. 3. Inverter as a buffer circuit with low output impedance. The output of the comparator comes from the \({V}_{\mathrm{out}\_\mathrm{com}}\) terminal